is sampled at a rate of to produce the sampled vector and then quantized. Assume, as usual, the minimum voltage of the dynamic range is represented by all zeros and the maximum value with all ones. The numbers should increase in binary order from bottom to top. Find the bit combination used to store each sample when rounded to the nearest integer between and (clipping may occur). Note: A partially-correct answer will not be recognized. You must answer all three correctly on the same

Question

Engineering

Mariela Perkins

29 November, 17:04

is sampled at a rate of to produce the sampled vector and then quantized. Assume, as usual, the minimum voltage of the dynamic range is represented by all zeros and the maximum value with all ones. The numbers should increase in binary order from bottom to top. Find the bit combination used to store each sample when rounded to the nearest integer between and (clipping may occur). Note: A partially-correct answer will not be recognized. You must answer all three correctly on the same

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Erica Owens · Answer 1

d[0] = 11111111

d[1] = 11011101

d[2] = 1111011

Explanation:

Assume that the number of bits is 8. The voltage range input is - 8 to 7 volts. The range is thus 15V, and the resolution is 15/2^8 = 0.0586 volts. We will first add + 8 to the input to convert it to a 0-15v signal. Then find the equivalent bit representation. For 7.8 volts, the binary signal will be all 1's, since the max input voltage for the ADC is 7 volts. For 4.95, we have 4.95+8 = 12.95 volts. Thus, N = 12.95/0.0586 = 221. The binary representation is 11011101. For - 0.8, we have - 0.8 + 8 = 7.2. Thus, N = 7.2/0.0586 = 123. The binary representation is 1111011.

Thus,

d[0] = 11111111

d[1] = 11011101

d[2] = 1111011